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Instruction set architecture
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#	Item
851	dsPIC30F FAMILY REFERENCE MANUAL dsPIC30F Family Reference Manual Errata Sheet The dsPIC30F Family Reference Manual (DS70046B) correctly describes the function of the dsPIC30F devices, except for the anomalies described Add to Reading List Source URL: ww1.microchip.com Language: English - Date: 2009-06-16 02:07:00 Computer engineering Microcontrollers Assembly languages PIC microcontroller MOV Addressing mode Memory address Control register X86 assembly language Computer architecture Computing Instruction set architectures
852	dsPIC30F PROGRAMMER’S REFERENCE MANUAL dsPIC30F Programmer’s Reference Manual Errata Sheet The dsPIC30F Programmer’s Reference Manual (DS70030E) conforms to the information provided in the manual, except for the an Add to Reading List Source URL: ww1.microchip.com Language: English - Date: 2009-06-16 01:37:24 MOV DEC Alpha Instruction set ARM architecture Computer architecture Instruction set architectures PIC microcontroller
853	SOFLOPO: Towards Systematic Software Exploitation for Low-Power Designs Add to Reading List Source URL: www.loe.ee.upatras.gr Language: English - Date: 2003-02-19 09:09:41 Central processing unit Digital signal processing Instruction set architectures Assembly languages Instruction set ARM architecture Digital signal processor Reduced instruction set computing Addressing mode Computer architecture Computing Electronics
854	SAP® Adaptive Server® Enterprise Document Version: [removed] Release Bulletin for HP-UX Table of Contents Add to Reading List Source URL: help.sap.com Language: English - Date: 2014-09-19 05:26:24 Instruction set architectures X86 architecture X86-64 64-bit Solaris Itanium IBM Tivoli Storage Manager X86 SAP AG Computer architecture Computing Software
855	Intel® Xeon® Processor E5 v2 Product Family Datasheet- Volume Two: Registers March[removed]Reference Number: [removed] Add to Reading List Source URL: www.intel.de Language: English - Date: 2014-03-04 00:23:45 Intel Computing Trusted Execution Technology Computer architecture Instruction set architectures Bloomfield Itanium Computer hardware Xeon Intel Core
856	Cortex®-A57 Software Optimisation Guide Date of Issue: January 19, 2015 Copyright ARM Limited[removed]All rights reserved. Add to Reading List Source URL: infocenter.arm.com Language: English Central processing unit Instruction set architectures Microarchitecture Microprocessors ARM architecture Hazard Instruction set Computer architecture Computer hardware Computer engineering
857	z/Architecture IBM Reference Summary Add to Reading List Source URL: publibz.boulder.ibm.com Language: English - Date: 2006-04-20 02:38:58 IBM System/370 IBM System/3 IBM ESA/390 Z/Architecture Machine code MVS IBM System z Control table IBM Basic assembly language Computing Computing platforms Instruction set architectures
858	SCIENTIFIC PROGRAMMING A COMPARISON OF THE FLOATING-POINT PERFORMANCE OF CURRENT COMPUTERS Steven H. Langer Add to Reading List Source URL: www.aip.org Language: English - Date: 1999-03-23 10:20:13 Instruction set architectures Classes of computers CPU cache Cache Central processing unit Computer memory Benchmark Microprocessor MIPS architecture Computing Computer architecture Computer hardware
859	Speculative Updates of Local and Global Branch History: A Quantitative Analysis Kevin Skadron SKADRON @ CS . VIRGINIA . EDU Add to Reading List Source URL: www.jilp.org Language: English - Date: 2003-06-05 15:33:55 Central processing unit Instruction set architectures Branch predictor Alpha 21264 CPU cache Out-of-order execution Register renaming Microarchitecture DEC Alpha Computer architecture Computer engineering Computer hardware
860	SAP® Adaptive Server® Enterprise Document Version: [removed] Release Bulletin for Windows Table of Contents Add to Reading List Source URL: help.sap.com Language: English - Date: 2014-09-19 05:25:44 Software X86 architecture X86-64 64-bit Solaris Itanium X86 SAP AG IBM Tivoli Storage Manager Computer architecture Computing Instruction set architectures

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